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TUA6120 ?tornado? gain controlled i/q mixer for digital qpsk or 8psk sat signals specification, version 2.01, 2004-02-05 wireless components never stop thinking.
edition 2004-02-05 published by infineon technologies ag, st.-martin-strasse 53, d-81541 mnchen, germany ? infineon technologies ag 9/16/03. all rights reserved. attention please! the information herein is given to describe certain components and shall not be considered as warranted characteristics. terms of delivery and rights to technical change reserved. we hereby disclaim any and all warranties, including but not limited to warranties of non-infringement, regarding circuits, descriptions and charts stated herein. infineon technologies is an approved cecc manufacturer. information for further information on technology, delivery terms and conditions and prices please contact your nearest infineon technologies office in germany or our infineon technologies representatives worldwide (see address list). warnings due to technical requirements components may contain dangerous substances. for information on the types in question please contact your nearest infineon technologies office. infineon technologies components may only be used in life-support devices or systems with the express written approval of infineon technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system, or to affect the safe ty or effectiveness of that device or system. life support devices or systems are intended to be implanted in the hu man body, or to support and/or maintain and sustain and/or protect human life. if they fail, it is reasonable to assume that the health of the user or other persons may be endangered.
TUA6120 ?tornado? gain controlled i/q mixer for digital qpsk or 8psk sat signals wireless components specification, version 2.01, 2004-02-05 never stop thinking.
target specification v1.1 confidential revision history: 2001-10-22 TUA6120 ?tornado? previous version: v1.0 2001-07-06 page subjects (major changes since last revision) 11 ff pinning 48 ff defaults added preliminary specifi cation version 1.2 confidential revision history: 2002-02-25 TUA6120 ?tornado? previous version: v1.1 2001-10-22 page subjects (major changes since last revision) all version to preliminary 12 ff equivalent i/o schematics and dc levels added 29 application circuit changed 38 items # 1 , # 10 , # 11 , # 12 , # 13 changed 42 item # 83 changed 43 items # 94 , # 95 , # 98 , # 100 changed 50 , 53 footnote added 55 , 56 band 10/11 overlap frequency changed 57 figure 4-2 changed 58 t su.enasda deleted preliminary specifi cation version 1.3 confidential revision history: 2002-12-20 TUA6120 ?tornado? previous version: v1.1 2001-10-22 page subjects (major changes since last revision) diverse input frequency extended to 2185 mhz 38 ff # 3 , # 4 , # 6 , # 8 , # 9 , # 10 , # 11 , # 12 , # 22 , # 29 , # 31 , # 32 , # 35 , # 69 , # 79 , # 80 , # 81 , # 63 , # 64 , # 65 , # 66 , # 91 , # 92 , # 93 , # 94 , # 95 changed, # 14 added 48 bits 0 to 17, 21, 23 changed 49 bits 0 to 9 changed, new charge pump currents 50 xtal i/o new output levels 52 new filter bandwidths 53 abl: new default 54 register 80: footnote changed
target specification version 1.4 confidential revision history: 2003-01-06 TUA6120 ?tornado? previous version: v1.3 2002-12-20 page subjects (major changes since last revision) 52 register 05: xtal output control bit added 55 vco band switching table band # 9 , # 10 : ghz-n and ghz-r divider ratio changed preliminary specification version 1.5 confidential revision history: 2003-07-31 TUA6120 ?tornado? previous version: v1.4 2003-01-06 page subjects (major changes since last revision) 11 function of pins 2, 14 and 23 changed 12 function of pin 2 changed 15 function of pin 14 changed 16 function of pin 23 changed 22 function of pins 2, 14 and 22 changed 29 function of pins 2, 14 and 22 changed 29 pin 12, loop filter changed 36 # 23 ; value changed 38 # 1 , # 3 , # 4 , # 7 , # 11 ; values changed 38 # 13 , # 14 ; value changed 39 # 21 , # 27 - # 29 ; value changed # 23 - # 25 ; new added 39 # 31 , # 32 ; value changed 41 # 54 ; value changed 41 # 61 - # 66 ; value changed # 62 ; new added 43 # 100 ; value changed # 101 ; new added 49 bit 15; definition changed 50 bit 7,6; definition changed 52 bit 5; value changed 54 bit 2,3,4,5; definition changed
preliminary specification version 2.0 confidential revision history: 2003-12-17 TUA6120 ?tornado? previous version: v1.5 2003-07-31 page subjects (major changes since last revision) 8 splitting tuning range changed 10 splitting tuning range changed 16 pin 20 equivalent i/o-schematic, corrected 22 block diagram corrected 29 application circuit, block diagram corrected 35 # 4 crystal oscillator divider, new 36 # 14 agc timing cap inputs , values changed 36 # 17 , # 18 v ref - , v vcoref - removed 36 # 17 , # 18 , # 19 v ref + , v vcoref + , v vref_bbf , values changed 36 # 21 esd-protection , value changed 36 # 23 ambient temperature, value new 38 # 1 stand-by, loop- through on, changed 38 rf input testing range changed 38 # 3 minimum rf input level test condition, new 38 # 4 maximum rf input level min. limit, new 38 # 6 gain control range min. limit, new 38 # 7 overall voltage gain limit, changed 38 # 11 input ip2, value changed 38 # 12 input ip2, value changed 38 # 14 loop-through gain test condition, new 39 # 15 rf input dc, new 39 # 16 rf output dc, new 39 # 26 filter stop band, new 40 # 33 base-band i / q inputs, new 40 # 37 agccap1 voltage, new 40 # 43 vref_bbf, new 40 # 45 vcoref+, new 40 # 47 vref+, new 40 # 49 ghz pll phase detector charge pump output, new 41 # 60 pll tuning step size, new added 41 # 63 - # 66 phase noise test condition, new 41 # 67 pll spurious at baseband outputs, new
41 # 68 charge pump dc value changed 42 # 71 - # 73 synthesizer pll active loop filter output, new 42 # 74 - # 77 tuning vco range added 42 # 82 - # 84 , # 89 crystal dc moved to reference oscillator i/o, new limits 43 # 102 adc clock for agc, new 43 table 4-4 xtaldiv1 xtaldiv2, corrected 47 i 2 c short read format, new 49 note 1) for ghz r/n-counter, new 50 bit 8 -12; adc clock description, added 50 note 3) for preamp = on, new 54 rssi bit 0 not used, corrected 55 vco band switching table changed 56 vco band splitting graph changed 58 # 1 - # 2 i 2 c bus l, h level changed 59 electrical diagrams, new specification version 2.01 revision history: 2004-02-05 TUA6120 ?tornado? previous version: v2.0 2003-12-17 page subjects (major changes since last revision) 12 correction of several average dc voltages 39 rf output dc, corrected for questions on technology, delivery and prices please contact the infineo n technologies offices in germany or th e infineon technologi es companies an d representatives worldwide: see ou r webpage at http ://www.infineon.com abm ? , aop ? , arcofi ? , arcofi ? -ba, arcofi ? -sp, digitape ? , epic ? -1, epic ? -s elic ? , falc ? 54, falc ? 56, falc ? -e1, falc ? -lh, idec ? , iom ? , iom ? -1, iom ? -2 ipat ? -2, isac ? -p, isac ? -s, isac ? -s te, isac ? -p te, itac ? , iwe ? , musac ? -a octat ? -p, quat ? -s, sicat ? , sicofi ? , sicofi ? -2, sicofi ? -4, sicofi ? -4 c slicofi ? are registered trademarks of infineon technologies ag. ace?, asm?, asp?, potswire?, quadfalc?, scout? are trademarks o f infineon technologies ag. controller area network (can): license of robert bosch gmbh
specification 8 2004-02-05 type ordering code package TUA6120 ?tornado? q 67037-a4 p-vqfn-48-4 gain controlled i/q mixer for digital qpsk or 8psk sat signals TUA6120 ?tornado? version 2.01 product info p-vqfn-48-4 general description the TUA6120 ?tornado? is a direct conversion receiver for digital qpsk or 8psk sat receiving systems in bicmos technology. features few, uncritical external components low impedance unbalanced rf input rf loop-through dual matched double balanced mixers digital generation of 0 /90 lo signals on-chip oscillators on-chip baseband filters balanced i/q outputs internal agc for constant output level db-linear rssi readout cmos pll-synthesizer 2 high current switch outputs buffered crystal oscillator i/o low noise reference voltage 3-wire bus with sub addresses i 2 c bus with 4 chip addresses and sub addresses splitting of sat tuning range into 14 bands lo frequency above input frequency no external tuning voltage required application dbs, dvb-s, dss and isdb-s set- top boxes suitable for dual-nim applications any i/q down converter from 915 mhz - 2185 mhz to 0 - 30 mhz
TUA6120 ?tornado? version 2.01 product description specification 9 2004-02-05 confidential 1 product description 1.1 overview the TUA6120 ?tornado? is a d irect c onversion r eceiver for digital qpsk or 8psk- sat receiving systems in bicmos technology. compared to the conventional superheterodyne receiver the dcr architecture eliminates expensive rf-filters for image rejection and if-filters for channel selection. instead there are on-chip filters with sele ctable bandwidth integrated. the dcr system is the most promising approach for low-cost digital set-top boxes front ends. via a lna input stage, the rf signal is split into two rails. one is the buffered loop- through rf output and, the other goes through a pga (p rogrammable g ain a mplifier) to the i/q- mixers. the signal of the synthesizer vco is multiplied to 4 x rf input frequency by an internal 3.8-8.6 ghz pll system. to drive the mixers, this 3.8-8.6 ghz signal is split into quadrature components by a digital divider by 4 . the vco from which the oscillator signal is derived, never runs at the input frequency. the mixers are followed by 2 matched base-band pga?s and filters. the filter roll-off is selectable by software. behind the filters external coupling capacitors eliminate undesired dc-components. then follow another two base-band amplifiers and output buffers. the gain of the q base-band amplifie r is adjustable for compensation of i/q gain impairment. the agc detector senses the output level and generates the control signals for the pgas and the rssi information which is readable via the bus. the agc system is optimized for best snr and im performance. 1.2 features few, uncritical external components low impedance unbalanced rf input rf loop-through dual matched double balanced mixers digital generation of 0 /90 lo signals on-chip oscillators on-chip baseband filters balanced i/q outputs internal agc for constant output level
TUA6120 ?tornado? version 2.01 product description specification 10 2004-02-05 confidential db-linear rssi readout cmos pll-synthesizer 2 high current switch outputs buffered crystal oscillator i/o low noise reference voltage 3-wire bus with sub addresses i 2 c bus with 4 chip addresses and sub addresses splitting of sat tuning range into 14 bands lo frequency above input frequency no external tuning voltage required 1.3 application dbs, dvb-s, dss and isdb-s set-top boxes suitable for dual-nimm applications any i/q down converter from 915 mhz - 2185 mhz to frequencies 0 - 30 mhz 1.4 package outline p_vqfn_48-4.eps
TUA6120 ?tornado? version 2.01 functional description specification 11 2004-02-05 2 functional description 2.1 pin configuration figure 2-1 pin configuration vcoref+ port1 vtune vcognd vcognd vcognd vcognd lpf1out cpout vref+ n.c. xtalio vref_bbf port0 cas/en scl sda lpf2 gndrfin rfin gndrfout rfout gnda2 vcca2 bb1iout bb1qout fiin fqin vccd vcca3 agccap2 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 48 47 46 45 44 43 42 41 40 39 38 37 TUA6120 'tornado' gnda3 agccap1 vcca1 gnda1 gndd xtalout xtalin xtaldiv1 busmode iout iouti qout qouti vcca4 gndout xtaldiv2 vcca5 36 35 34 33 32 31 30 29 28 27 26 25
TUA6120 ?tornado? version 2.01 functional description specification 12 2004-02-05 2.2 pin definitions and function table 2-1 pin definition and function pin no. symbol equivalent i/o-schematic average dc voltage 1 cas/en n.a. 2 vref_bbf 2.4 v 3 port0 0.0/5.0 v 4 vcca1 power supply analog 5.0 v 5 gnda1 ground 0.0 v 1 v ref 2 3
TUA6120 ?tornado? version 2.01 functional description specification 13 2004-02-05 table 2-1 pin definition and function (continued) pin no. symbol equivalent i/o-schematic average dc voltage 6 rfin 2.0 v 7 gndrfin ground 0.0 v 8 gnda2 ground 0.0 v 9 vcca2 power supply analog 5.0 v 10 rfout 1.4 v 11 gndrfout ground 0.0 v 6 10
TUA6120 ?tornado? version 2.01 functional description specification 14 2004-02-05 table 2-1 pin definition and function (continued) pin no. symbol equivalent i/o-schematic average dc voltage 12 lpf2 n.a. 13 vcoref+ 1.75 v 12 13 vref
TUA6120 ?tornado? version 2.01 functional description specification 15 2004-02-05 table 2-1 pin definition and function (continued) pin no. symbol equivalent i/o-schematic average dc voltage 14 port 1 0.0/5.0 v 15 vcognd ground 0.0 v 16 vcognd ground 0.0 v 17 vcognd ground 0.0 v 18 vcognd ground 0.0 v 19 vtune n.a. 14 19
TUA6120 ?tornado? version 2.01 functional description specification 16 2004-02-05 table 2-1 pin definition and function (continued) pin no. symbol equivalent i/o-schematic average dc voltage 20 lpf1out n.a. 21 cpout n.a. 22 vref+ 1.6 v 23 n. c. n. a. 20 vcc 5k ? 21 22 vref
TUA6120 ?tornado? version 2.01 functional description specification 17 2004-02-05 table 2-1 pin definition and function (continued) pin no. symbol equivalent i/o-schematic average dc voltage 24 xtalio n.a. 25 xtaldiv2 0.0/3.2 v 26 xtalin 1.6 v 27 xtalout 1.6 v 24 28 25 26 27
TUA6120 ?tornado? version 2.01 functional description specification 18 2004-02-05 table 2-1 pin definition and function (continued) pin no. symbol equivalent i/o-schematic average dc voltage 28 xtaldiv1 0.0/3.2 v 29 busmode 5.0 v 30 qouti 2.4 v 31 qout 2.4 v 32 gndout ground 0.0 v 28 25 29 31 30
TUA6120 ?tornado? version 2.01 functional description specification 19 2004-02-05 table 2-1 pin definition and function (continued) pin no. symbol equivalent i/o-schematic average dc voltage 33 iouti 2.4 v 34 iout 2.4 v 35 vcca5 power supply analog 5.0 v 36 vcca4 power supply analog 5.0 v 37 vcca3 power supply analog 5.0 v 38 gnda3 ground 0.0 v 39 agccap1 3.15 v 34 33 39
TUA6120 ?tornado? version 2.01 functional description specification 20 2004-02-05 table 2-1 pin definition and function (continued) pin no. symbol equivalent i/o-schematic average dc voltage 40 agccap2 1) n.a. 41 fqin 2.4 v 42 bb1qout 2.4 v 40 41 42
TUA6120 ?tornado? version 2.01 functional description specification 21 2004-02-05 table 2-1 pin definition and function (continued) pin no. symbol equivalent i/o-schematic average dc voltage 43 fiin 2.4 v 44 bb1iout 2.4 v 45 vccd power supply digital 5.0 v 46 gndd ground 0.0 v 47 sda n.a. 48 scl n.a. 1) if the agc is in external mode, this pin is used as agc input, see register 04 on page 51 43 44 47 48
TUA6120 ?tornado? version 2.01 functional description specification 22 2004-02-05 2.3 functional block diagram TUA6120 blockdiag figure 2-2 block diagram v c c a 4 v c c a 5 f i o u t f q o u t v c o g n d v c o g n d v c o g n d l p f 1 o u t v c o g n d v r e f _ b b f v c o r e f + c p o u t v c c a 3 a g c c a p 2 b u s m o d e a g c c a p 1 s c l s d a i o u t i o u t i q o u t i x t a l o u t x t a l i n x t a l d i v 2 x t a l d i v 1 g n d o u t q o u t v r e f + x t a l i o n . c . v c c d b b 2 q i n b b 2 i i n g n d d g n d a 3 v t u n e g n d r f i n r f i n g n d r f o u t r f o u t g n d a 2 v c c a 2 l p f 2 c a s / e n g n d a 1 p o r t 1 p o r t 0 v c c a 1 i 2 c / 3-wire bus i- baseband filter crystal oscillator crystal divider 47 46 45 44 43 42 41 48 1 13 14 15 16 17 18 19 20 p0 2 3 4 5 6 7 8 9 10 11 12 21 22 23 24 30 25 27 26 28 29 31 32 33 34 35 36 40 39 38 37 lna rf buffer pga i-mixer q-mixer q- baseband filter q- baseband amp i- baseband amp i- baseband amp q- baseband amp power supply crystal i/o buffer synthesizer vcos cmos synthesizer pll agc detector rssi agc encoder ghz vcos, ghz pll, quadrature phase generator
TUA6120 ?tornado? version 2.01 functional description specification 23 2004-02-05 2.4 frequency programming the tuning frequency of the rf input controlled by the pll is given below: figure 2-3 input frequency calculation rf : frequency of rf input. ri : reference frequency input (crystal oscillator). p : divide ratio of the prescaler [p/(p+1) = (32/33)] . a : divide ratio of the a-counter (max. 7 bit). n : divide ratio of the n-counter (max. 11 bit). r : divide ratio of the r-counter (max. 10 bit). m = (p ? n) + a : total divide ratio of the pll (with a < n). in addition to the above calculation, for each frequency the correct values of the ghz pll and the vco settings must be set. see ?vco band switching table? on page 55 figure 2-4 condition for continuous frequency steps 2.5 functional block description the main functions of the chip are split into a bipolar analog signal processing, a bipolar digital signal generation of 0 / 90 lo-signals, and a cmos synthesizer. extremely symmetrical layout with matche d structures result in best phase and gain balance of the in-phase and quadrature-phase signals. 2.5.1 agc-system a complete agc system is integrated. at the i/q outputs an agc detector monitors the output signal. it generates a db-linear rssi signal to the input level (r adio s ignal s trength i ndicator), and control signals to adjust the gain of the pga?s (p rogrammable g ain a mplifiers). pga?s are used because of their good intermodulation performance during gain control. the smallest agc st ep is 0.5 db, the agc range is 63.5 db. the internal agc can be disabled. then an external agc voltage can be applied to pin 40. fin p ( [ n ) a ] fref r -------- m r --- - fref with a n ? = ? + ? = pn ? () a + [] pp1 ? [] ?
TUA6120 ?tornado? version 2.01 functional description specification 24 2004-02-05 2.5.2 lna and rf-buffer the lna is a 75 ? input amplifier with high linearity and low noise. at its output the rf signal is split. one part goes through the rf-buffer amplifier to a 75 ? rf-output. 2.5.3 pga and i/q-mixers the other part goes through a 48 db control range pga to the i and q mixers. both are of the double balanced mixer (gilbert cell) type. a second pga is arranged between the mixer output and the following baseband amplifier. for best performance the 0 / 90 lo-signals are fed to the mixers via open collector stages with well defined output impedance and levels. 2.5.4 baseband amplifiers and filters the 4 base band amplifiers are of wide-band operational type with high overshoot margin. the amplifiers have a fixed gain of 16 db and 30 mhz -0db bandwidth. the distribution of the whole dc-gain into two ac-coupled 16 db amplifiers ensures that the base band amplifiers are not overloaded by a dc-vol tage that may be caused by mixer offset or mixer lo feedback to the input. all 4 outputs ca n be disabled by bus control. in this state the outputs switch to low voltage and low impedance. filters with programmable roll-off are inserted between the baseband amplifiers. the i and q output voltages are programmable. the outputs are differential for best interference immunity. 2.5.5 output ports the output ports are designed with open collector transistors for high current pull down and slow switching application. 2.5.6 reference voltage the central reference voltage is a low noise high pssr bandgap with approx. 2.4 v dc and low temperature drift. 2.5.7 reference oscillator the reference oscillator operates with crystals from 1 - 16 mhz.
TUA6120 ?tornado? version 2.01 functional description specification 25 2004-02-05 2.5.8 crystal oscillator input/output this pin accepts an external quartz clock or supplies a quartz clock to the channel decoder. the frequency is controlled by a divider stage. 2.5.9 synthesizer loop filter the synthesizer loop filter can be designed ac tive by using an internal inverting bicmos amplifier or passive ( see application circuit on page 29 ). the loop filter input is internally connected to the phase detector / charge pump output. the bicmos amplifier output may be disabled (high impedance) by bus. 2.5.10 synthesizer vco?s the synthesizer vco?s are symmetrical colpitts type oscillators with high-q internal tank circuits. the synthesizer vco?s oscillate at a program mable offset to the input frequency. this guarantees minimum oscillator pulling and self-mixing which results in undesirable dc offset voltage. 2.5.11 phase shift 0 / 90 to get minimum quadrature phase error, a digital generation of the 0 /90 phase shifted local oscillator signal is implement ed by a 3.8-8.6 ghz johnson-counter 4 . this counter is designed in high sp eed stacked ecl bipolar technology. 2.5.12 ghz vco this block consists of two on-chip bipolar lc-oscillators (3.4-6.2 ghz and 6.0-8.6 ghz) controlled via on-chip pll . the ghz vco?s oscillate at 4 times the input frequency and are current controlled. the resonant circuit is an on chip symmetrical inductor driven by differential pair amplifier whose current variable parasitic capacitan ce is used for frequency tuning. the used special multi-tanh gilbert cell makes a wide tuning range possible. the ghz vco?s are under control of a 3.8-8.6 ghz pll system. the reference frequency of this system is the output of the synthesizer vco divided by a programmable counter; variation is 200-315 mhz (depending on the selected synthesizer tuning range). at the same time this is the operating frequency range of the phase detector / charge pump. the high speed charge pump is completely on-chip and designed in bicmos technology with an external loop filter bandwidth set to 9 mhz. the ghz vco frequency is fed to the phase detector via the high speed ecl johnson counter 4 and a lower speed programmable ecl counter.
TUA6120 ?tornado? version 2.01 functional description specification 26 2004-02-05 2.6 ghz pll with conventional dcr systems the synthesizer vco oscillates exactly at the desired receiving frequency. this is avoided in the TUA6120 ?tornado? by a cascaded double pll tuning system. the main benefits of this concept are: accurate 0 / 90 generation of the lo signals for the rf input mixers no oscillator at input frequency programmable frequency offset of the synthesizer vco referred to the rf input fre- quency and due to that a very low vco oscillator pulling and self mixing due to crosstalk the possibility of splitting the tuning range into several bands. these advantages are derived from a 2 nd ghz pll system with two vco?s at 4 x fin. this 2 nd ghz pll system is located in the broken up feedback of the synthesizer pll 1 between the vco1 and the programmable counter input n1. figure 2-5 cascaded pll system this location enables a shift of the synthesizer vco1 to other frequencies, independent of the required input lo frequency of the rf mixers. in this case the synthesizer vco must not oscillate at the required lo frequency of the mixer input. nevertheless the synthesizer pll is referred to the lo frequency of the mixer input which makes it easy to program the pll because it is set exactly to the receiving frequency. another benefit is the exact mapping of the pll stepsize to the tuning frequency. this is not possible in a conventional pl l tuning system with the feedback of the vco1 directly to the programmable counters n1, if the vco1 is not running on the rf input cascaded pll system fref r2 r1 pd1 cp1 n1 pd2 cp2 n2 interrupted lo i/q output r : reference counter n : main counter pd : phase detector cp : charge pump vco : voltage controlled oscillator q2 pll 1 pll 2 vco2 vco1 to mixer pll 1 (synthesizer) q2 : quadraturphase + prescaler x
TUA6120 ?tornado? version 2.01 functional description specification 27 2004-02-05 frequency. this may become clear in the above concept, if the interrupted pll 1 is closed and the lo i/q output is cut off from node x. in this case step size and tuning frequency have additional terms of calcul ation. depending on t he system concept. they do not fit to the programmed values of the synthesizer pll 1, because it is referred to the vco1 and no longer to the lo i/q output. (following dependencies will become valid, f tune = (n2 / r2) ? f vco1 and f step = (n2 / r2) ? pll1 step ). the r2 and n2 counters of the ghz pll enable a programmable frequency offset of the synthesizer vco to the rf input as well as a splitting of the required rf tuning range. for the band splitting feature the counters r2 and n2 of the ghz pll must be used with 2 different values (e.g. 4/2 a nd 4/3). as a result vco1 will pass his range twice, while the lo i/q output to mixer will have a tuning range which is split into 2 bands. in the feedback of the ghz pll is located the high speed johnson-counter 4 (q2) which acts as prescaler for the two 3.4 - 8.6 ghz vco?s and accurate 0 / 90 lo generator. the complete ghz pll is designed in high speed ecl cascoded technology which enables counter frequencies up to 15 ghz, oscillator frequencies up to 10 ghz and phase detector / charge pump signal slopes of less then 100 ps.
TUA6120 ?tornado? version 2.01 functional description specification 28 2004-02-05 2.6.1 functional ghz pll block diagram figure 2-6 ghz pll block diagram 2 nd ghz pll (quadrature phase loop) vco2 4 x fin 3.4-6.2ghz 0/90counter 2 counter 2 i to the q phase detector type 4 100-550 mhz 0.95-2.15 gn counter 2 - 8 programmable 0.4 - 3.8 ghz counter 2 gr fpd2 counter 2 - 8 programmable 0.85 - 2.2 ghz counter 2 9 mhz loop filter mixers ghz programming lines 6.0-8.6ghz programming phase detector type 4 dc - 2 mhz quadrature phase generator, synthesizer vco synthesizer loop counter 2-1023 programmable 0.5 - 16 mhz r reference 1-16 mhz oscillator counter 2-2023 programmable 1 - 150 mhz n + a interface i 2 c / 3-wire bus 32 / 33 modulus.prescaler 0.2 - 2.5 ghz p fvco synthesizer fref f n 2 nd ghz-pll , performing conventional synthesizer loop programming lines input programming lines 3.2 - 3.5 ghz 25 khz loop filter band-switching and vco offset input = fpr fvco detailed drawing 2 nd loop 2 nd loop output f vco f iq gr gn -------- - ? = reference input 3.5 - 3.8 ghz f iq
TUA6120 ?tornado? version 2.01 application specification 29 2004-02-05 3application 3.1 application circuit TUA6120 application figure 3-1 application circuit r f i n r f o u t v c c a n a l o g 2 l o o p f i l t e r 2 b u s m o d e s c l c a s / e n s d a v c c a n a l o g 1 x t a l d i v 2 x t a l d i v 1 x t a l i o v c c d i g i t a l 100n 220 220n 100p 100p 100n 1n 6k8 100n 470p 2.2k 220n iout 220n iouti 220n 220n 220n 4n7 4n7 39p 4 mhz 10p port0 4n7 220 4n7 4n7 4n7 100n 1.8k 1n 220n 220n 39p vcca5 100n vcca4 100n v c c a 3 100n 100n 470p 2.2k 1.8k 1n 19 20 21 passive active loop filter 1 e x t . a g c 100n i 2 c / 3-wire bus i- baseband filter crystal oscillator crystal divider 47 46 45 44 43 42 41 48 1 13 14 15 16 17 18 19 20 p0 2 3 4 5 6 7 8 9 10 11 12 21 22 23 24 30 25 27 26 28 29 31 32 33 34 35 36 40 39 38 37 lna rf buffer pga i-mixer q-mixer q- baseband filter q- baseband amp i- baseband amp i- baseband amp q- baseband amp power supply crystal i/o buffer synthesizer vcos cmos synthesizer pll agc detector rssi agc encoder ghz vcos, ghz pll, quadrature phase generator 100p 220 100p 10 10n p o r t 1 4n7 220n 100 100 qouti qout 22p 22p 100 100 22p 22p
TUA6120 ?tornado? version 2.01 application specification 30 2004-02-05 3.2 phase noise performance of application the over all system phase noise at base band of the tua 6120 is strongly dependent on several parameters : 1.programming of the 2nd pll (ghz-pll setting of the r2 and n2 counter) 2.programming of the 1st synthesizer pll ? receiving frequency (variation of the vco steepness due to non linearity of the varicap), ? phase detector current, ? crystal frequency, ? step size = fref, ? loop filter parameter. ( bandwidth ) a well balanced phase noise over the whole tuning range requires an optimized parameter programming of the synthesizer pll for each receiving frequency ?1 st you have to decide for the optimum loop filter bandwidth for your application. narrow band loop filter : achieves better pll outband ph ase noise at high frequencies offset but lower pll inband phase noise at low frequency offset. wide band loop filter : achieves better pll inband phase noise at lo w frequencies offset but lower pll outband phase noise at high frequency offset. ?2 nd you have to decide for the crystal frequency for your application. higher crystal frequency achieves better pll inband phase noise. ?3 rd you have to decide for the main stepsize for your application. higher step size achieves better pll inband phase noise. ?4 th during programming the desired receiving frequency you have to set step size and phase detector output current for each frequency. this is necessary to compensate the non linearity of the varicap. for detailed information see our separate evaluation report tua 6120 c1/c2. all this is done in the above applicatio n circuit which obtains in conjunction with the tua 6120 programming kit the follo wing worst case phase noise values : wide band loop filter 25 khz, at tuning frequency 2150 mhz offset frequency 1 10 100 1000 khz measured phase noise at base band - 82 - 83 - 102 - 108 dbc/hz
TUA6120 ?tornado? version 2.01 application specification 31 2004-02-05 vco gain vs. vtune (typical) valid for the application above, band splitting into 14 ranges vco gain vs. fin (typical) valid for the application above, band splitting into 14 ranges

TUA6120 ?tornado? version 2.01 application specification 32 2004-02-05 vco tuning voltage (typical) valid for the application above, band splitting into 14 ranges optimum phase detector current (typical) for minimum loop filter bandwidth variation valid for the application above, band splitting into 14 ranges
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TUA6120 ?tornado? version 2.01 application specification 33 2004-02-05 optimum available phase detector current (typical) phase detector current switching table (typical) result of graphics above > mhz ma > mhz ma > mhz ma 900 1.333 1242 2.000 1680 1.333 912 1.667 1255 1.000 1725 1.667 931 2.000 1261 1.333 1750 1.000 935 1.000 1294 1.667 1778 1.333 960 1.333 1313 1.000 1824 1.667 986 1.667 1334 1.333 1862 2.000 1000 1.000 1368 1.667 1885 1.000 1016 1.333 1396 2.000 1922 1.333 1043 1.667 1415 1.000 1972 1.667 1064 2.000 1441 1.333 2000 1.000 1080 1.000 1479 1.667 2032 1.333 1120 1.333 1500 1.000 2084 1.667 1150 1.667 1524 1.333 2129 2.000 1167 1.000 1563 1.667 2155 1.000 1185 1.333 1596 2.000 1216 1.667 1615 1.000 )4&&%&-%

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TUA6120 ?tornado? version 2.01 reference specification 35 2004-02-05 4 reference 4.1 electrical data 4.1.1 absolute maximum ratings warning the maximum ratings may not be ex ceeded under any circumstances, not even momentarily and individually, as permanent damage to the ic will result. table 4-1 absolute maximum ratings # parameter symbol limit values unit remarks min max 1 supply voltages 1, 2, 3, 4, 5 v vcca1, 2, 3 ,4, 5 - 0.3 5.5 v 2 supply voltage 6 v vccd - 0.3 5.5 v 3 crystal oscillator v xtalout, xtalin - 0.3 3.2 v 4 crystal oscillator divider v xtaldiv1, 2 - 0.3 3.2 v 5 crystal oscillator buffered i/o v xtalio 0 v vccd v 6 synthesizer charge pump out v cpout 0 v vccd v 7 synthesizer loop filter output v lpf1out 0 v vccd v 8 port outputs v p0, p1 0 v vccd v i p0, p1 15 ma i p0, p1 30 ma 9 port outputs, v p0, p1 = v vccd , i = max t imax 1ms 10 ghz-pll charge pump out v lpf2 0 v vcca2 v 11 baseband outputs v fiout , v fqqout 0 v vcca2 v i bb1iout , i bb1qout 4ma 12 baseband filter inputs i/q v bb2iin , v bb2qin 0 v vcca1 v
TUA6120 ?tornado? version 2.01 reference specification 36 2004-02-05 notes: all values are referred to ground (pin), unless stated otherwise. all currents are designated according to the source and sink principle, i.e. if the device pin is to be regarded as a sink (the current flows into the stated pin to internal ground), it has a negative sign, and if it is a source (the current flows from vs across the designated pin), it has a positive sign. table 4-1 absolute maximum ratings (continued) # parameter symbol limit values unit remarks min max 13 baseband outputs v iout , iouti, v qout , qouti 0 v vcca1 v i iout , iouti, i qout , qouti 4ma 14 agc timing cap inputs v agccap1, v agccap2 0 3.2 v 15 rf input v lna 0 3.5 v 16 rf output v rfout 1.0 2.0 v 17 reference voltage filter v ref+ 0 3.2 v 18 vco reference voltage filter v vcoref+ 0 3.2 v 19 baseband filter reference v vref_bbf 0 3.2 v 20 i 2 c / 3-wire-bus scl,sda, cas/en busmode - 0.3 v vccd +0.3 v 21 esd-protection v esd 2kv 1) 22 total power dissipation p tot 1300 mw 23 ambient temperature t a -20 70 c 2) 24 junction temperature t j 125 c 25 storage temperature t stg 150 c 26 thermal resistance junction case r th 2k/w 3) 1) all esd tests done according to eia/jesd22-a114-b (hbm in circuit test), as a single device in circuit contact discharge test. 2) the maximum ambient temperature depends on the mounting conditions of the package. any application mounting must guarantee not to exceed the maximum junction temperature of 125 c. 3) referred to top center of package.
TUA6120 ?tornado? version 2.01 reference specification 37 2004-02-05 4.1.2 operating range table 4-2 operating range # parameter symbol limit values unit test conditions item min max 1 supply voltages 1,2,3,4,5 v vcca1, 2, 3, 4, 5 4.75 5.25 v 2 supply voltage 6 v vccd 4.75 5.25 v 3 difference between vcca1, vcca2, vcca3, vcca4, vcca5, vccd and between all gnd pins ? v -0.3 0.3 v 4 input frequency range f rfin 915 2185 mhz 5 ambient temperature t a -20 70 c 1) 1) the maximum ambient temperature depends on the mounting conditions of the package. any application mounting must guarantee not to exceed the maximum junction temperature of 125 c. this value is not subject to production te st - verified by design/characterization.
TUA6120 ?tornado? version 2.01 reference specification 38 2004-02-05 4.1.3 ac/dc characteristics table 4-3 ac/dc characteristics, t a = 25 c, v vcca1 ,v cca2 , v ccd = 5 v # parameter symbol limit values unit test conditions item min typ max power supply 1 total current consumption i vcca1 + i vcca2+ i vcca3+ i vcca4+ i vcca5+ i vccd 155 189 225 ma normal operation pin 4,9, 35, 36, 37, 45 183 ma loop-through off 9 ma total stand by 50 ma stand-by, loop- through on rf input (950-2150mhz) rf source impedance 75 ?, rf input, pin 6, test circuit 2 input frequency f rfin 915 2185 mhz pin 6 3 minimum rf input level v rfin -79.5 dbm f = 1000 mhz -82 -77 dbm output level = 1v pp differential 4 maximum rf input level v rfin -19.5 -17.0 dbm f = 1000 mhz, in agc range -8 dbm out of agc range 5 input impedance r rfin 75 ? f = 0.9 - 2.2 ghz c rfin 1.2 pf 6 gain control range ? g v 61 63.5 db 7 overall voltage gain g v 81 83,5 db output level = 1v pp differential 8 vco power present at rf input p vco -60 - 50 -40 dbm f = r 2 / n 2 x f in 9 lo power present at rf input p lo - 90 -80 dbm f = f in 10 input compression point -1 db icp -5 -3 dbm minimum gain 11 input ip2 iip2 35 40 dbm input level = -25 dbm output level = 600 mvpp differential 22mhz bbfilter on 12 input ip3 iip3 510 dbm 13 noise figure nf 10 11.5 db maximum gain, dsb 14 loop-through gain gp -1 db 75 ?, load pin 10
TUA6120 ?tornado? version 2.01 reference specification 39 2004-02-05 table 4-3 ac/dc characteristics, t a = 25 c, v vcca1 , v cca2 , v ccd = 5 v (cont?d) # parameter symbol limit values unit test conditions item min typ max rf input dc 15 dc voltage v rfin 1.8 2.0 2.2 v pin 6 rf output dc 16 dc voltage v rfout 1.2 1.4 1.6 v pin 10 base-band i / q outputs, iout, iouti, qout, qouti, bb1iout, bb1 qout, pins 34-33, 31-30, 44, 42 17 dc voltage v iout,qout 2.4 v r l >1m ? also pins 42, 44 18 dc quiescent current i iout,qout 2.4 ma r l >1m ? 19 baseband i/q output voltage see register 05 on page 52 v iout v qout 500 1000 2000 mv pp r l >1m ?, c l < 10p, differential 20 baseband i/q output bandwidth bw - 0.5 db 20 22 mhz no filter reference=1mhz 1v pp differential 21 bw -1 db 30 35 mhz 22 bw -3 db 50 60 mhz 23 baseband filter 1 bandwidth bw -1 db 9.8 11 12.2 mhz reference=1mhz 1v pp differential table "register 05" on page 52 f > 3 x f roll-off 24 baseband filter 2 bandwidth bw -1 db 19.5 22 24.5 mhz 25 baseband filter 3 bandwidth bw -1 db 29 33 37 mhz 26 filter stop band ? -45 -50 dbc 27 baseband i/q output flatness ? g 0.5 db up to 10 mhz, no filter 28 quadrature error, phase ? 2 4deg 950 mhz, 1600 mhz, 2150 mhz, rfin = -35 dbm, test circuit 29 quadrature error, gain ? g 0 0.5 db 30 baseband i/q output impedance r iout, r qout 50 ? dynamic resistance also pins 42, 44 31 snr @ 45 mbaud, 1vpp differential ifout, qfout 57 db maximum gain 32 ifout, qfout 28 33 db minimum gain
TUA6120 ?tornado? version 2.01 reference specification 40 2004-02-05 table 4-3 ac/dc characteristics, t a = 25 c, v vcca1 , v cca2 , v ccd = 5 v (cont?d) # parameter symbol limit values unit test conditions item min typ max base-band i / q inputs fiin, fqin, pins 41, 43 33 dc voltage v fiin,fqin 2.4 v r l >1m ? 34 input resistance r fiin,fqin 18 k ? internal agccap2 voltage input 35 gain control range ? v gain 0.35 1.65 v typical values pin 40 36 gain control input impedance r gain 1 m ? pin 40 agccap1 voltage (agc = internal) 37 agc rectifier voltage v agccap1 3.15 v within agc range pin 39 port outputs, p0, p1 38 supply voltage v p 0 5.5 v max. vcc pins 3,14 39 low output voltage v p 0 0.5 v i p = 15 ma 40 low output current i p 15 ma 41 high output current i p 0 10 a v p = 5 v 42 port outputs, i = max t imax 1ms v p0, p1 = v vcc vref_bbf 43 reference voltage v ref 2.2 2.4 2.6 v pin 2 44 vref output current i ref 2ma vcoref+ 45 reference voltage v ref 1.6 1.75 1.9 v pin 13 46 vref output current i ref 2ma vref+ 47 reference voltage v ref 1.45 1.6 1.75 v pin 22 48 vref output current i ref 2ma ghz pll phase detector charge pump output / loop filter input 49 dc voltage v lpf2 0.4 4.5 v loop locked pin 12 50 dc current i lpf2 -100 100 a
TUA6120 ?tornado? version 2.01 reference specification 41 2004-02-05 table 4-3 ac/dc characteristics, t a = 25 c, v vcca1 , v cca2 , v ccd = 5 v (cont?d) # parameter symbol limit values unit test conditions item min typ max synthesizer pll 51 n-counter divider n 2 2047 11-bit, cmos 52 a-counter divider a 0 127 7- bit, cmos 53 r-counter divider r 2 1023 10-bit, cmos 54 prescaler divider p 32/33 bipolar 55 equivalent phase noise at phase detector input, @ 1 khz offset, within loop band width, 6 khz loop bw, ssb pll -164 dbc / hz f ref = 30 khz 56 pll -159 dbc / hz f ref = 100 khz 57 pll -158 dbc / hz f ref = 125 khz 58 pll -155 dbc / hz f ref = 250 khz pll -149 dbc / hz f ref = 1000 khz 59 quadrature phase mismatch ? 2 4 deg 60 pll tuning step size f ref 1 2000 khz 61 total divider ratio 1) m 992 65631 p = 32/33 62 input frequency f rfin 794 992 1984 mhz f ref = 800 khz f ref = 1 mhz f ref = 2 mhz 1) the minimum total divider ratio is only important for continuous frequency step size, if lower divider ratios are used not all frequencies are po ssible. to find out the missing frequencies our control program for i 2 c / 3-wire bus may be used. overall phase noise, fref = 800 khz, loop filter bandwidth = 25 khz (figure 3.1) 63 phase noise ssb output level = +10dbm, 2 mhz tot 80 84 dbc / hz 1 khz offset 64 tot 82 86 dbc / hz 10 khz offset 65 tot 100 105 dbc / hz 100 khz offset 66 tot 105 110 dbc / hz 1 mhz offset pll spurious at baseband outputs iout, iouti, qout, qouti 67 pll spurious att -40 dbc f out =1mhz, 1v pp diff. synthesizer phase detector charge pump output / vtune input 68 dc voltage v cpout 0.4 4.5 v loop locked pin 19 pin 21 69 dc current i cpout 1 2ma 70 tristate output current i cpout 0.1 1na v cpout = 2 v
TUA6120 ?tornado? version 2.01 reference specification 42 2004-02-05 table 4-3 ac/dc characteristics, t a = 25 c, v vcca1 , v cca2 , v ccd = 5 v (cont?d) # parameter symbol limit values unit test conditions item min typ max synthesizer pll active loop filter output 71 dc voltage v lpf1out 0.4 v vcc v internal pull-up pin 20 72 dc current i lpf1out 10 5000 a 73 internal pull-up r lpf1out 5 k ? connect to v ccd tuning vco?s 74 synthesizer vco 1 f 3230 3500 mhz 75 synthesizer vco 2 f 3500 3770 mhz 76 ghz vco 1 f 3600 6200 mhz 77 ghz vco 2 f 5900 8800 mhz crystal oscillator 78 crystal frequency f 14 16 mhz parallel resonance pins 26, 27 79 crystal resistance r 30 100 ? series resonance 80 negative input impedance z xtalin 420 ? f = 4 mhz 81 drive current i qosz 900 a rms f = 4 mhz reference oscillator input/output 82 dc voltage xtalin see register 02 on page 50 v xtalin -0.2 0 3.0 v preamp enabled pin 24 00.9 3.0 v preamp disabled 83 xtalio input voltage, see register 02 on page 50 v xtalio 150 200 1000 mv pp preamp = on 84 1.5 1.8 3.0 v pp preamp = off 85 xtalio input impedance r xtalio 400 k ? 86 xtalio output voltage see register 02 on page 50 v xtalio 1.6 v pp r l > 1m ?, vcc = 5 v, c l = 10 pf 87 2.4 v pp 88 3.2 v pp 89 xtalout v dc v xtalout 0 3.2 v see register 02 on page 50 90 xtalio output current i xtalio 0.1 ma 91 xtalio output impedance r xtalio 1.4 k ? v xtalio = 1.8 v pp 92 r xtalio 1.2 k ? v xtalio = 2.6 v pp 93 r xtalio 1.2 k ? v xtalio = 3.3 v pp
TUA6120 ?tornado? version 2.01 reference specification 43 2004-02-05 table 4-3 ac/dc characteristics, t a = 25 c, v vcca1 , v cca2 , v ccd = 5 v (cont?d) # parameter symbol limit values unit test conditions item min typ max i 2 c and 3-wire-bus clock, data, ena ble, pins 1, 47, 48 94 high level input voltage v ih 1.30 v vcc v v vcc of p in the range 1.8 to 5 v 95 low level input voltage v il -0.5 0.71 v 96 low level output voltage (data), only i2c-bus v ol 0 0.4 0.6 v 3 ma sink current 6 ma sink current 97 hysteresis of schmitt trigger inputs v hys 0.2 v 98 h-input current i h 10 a v i = v vcc 99 l-input current i l -10 a v i = gnd 1 ) v vcc of p in the range 1.8 to 5 v. busmode 100 h-input current h-input voltage l-input current i h v h i l v vcc -1 -60 v vcc 10 a v a v i = v vcc v i = open v i = gnd pin 29 xtaldiv1, xtaldiv2 101 h-input voltage l-input current v h i l 2.8 -60 3.2 v a v i = open v i = gnd pins 25, 28 adc clock for agc = crystal frequency / adc clock divider see register 02 on page 50 102 adc clock freq. f in 0.5 1mhz table 4-4 xtal divider ratio xtaldiv2 1) 1) 0: pin is connected to ground. 1: pin is open (internal pull up current). xtaldiv1 1) xtal divider ratio 0 01 0 12 1 04 1 18
TUA6120 ?tornado? version 2.01 reference specification 44 2004-02-05 4.2 bus interface 4.2.1 addressing table 4-5 pin function pin designation busmode sda scl cas / en function bus mode select serial data clock i 2 c: chip address select,3-w: enable i 2 c mode 0 data in/out clock in four chip addresses 1) 1) see table 4-6 chip address organization in i2c mode on page 44 , see table 4-7 address selection in i2c mode on page 44 . 3-wire mode 1 or open 0: chip is addressed table 4-6 chip address organization in i 2 c mode name byte msb bit6 bit5 bit4 bit3 bit2 bit1 lsb write mode address byte adb 1 10 00 ma1 ma0 r/w=0 read mode address byte adb 1 10 00 ma1 ma0 r/w=1 table 4-7 address selection in i 2 c mode chip address (hex) voltage at cas/en ma1 ma0 write mode read mode (0 to 0.1) x v cc 00 c0 c1 open circuit or (0.2 to 0.3) x v cc 01 c2 c3 (0.4 to 0.6) x v cc 10 c4 c5 (0.9 to 1) x v cc 11 c6 c7
TUA6120 ?tornado? version 2.01 reference specification 45 2004-02-05 4.2.2 sub addressing table 4-8 sub addresses of write data registers function hex msb s6 s5 s4 s3 s2 s1 lsb a/n divider 00 0 00 00 00 0 reference divider 01 0 00 00 00 1 control bytes 02 0 00 00 01 0 port byte 03 0 00 00 01 1 agc mode 04 0 00 00 10 0 baseband control 05 0 00 00 10 1 test modes 06 0 00 00 11 0 table 4-9 sub addresses of read data registers function hex msb s6 s5 s4 s3 s2 s1 lsb status 80 1 00 00 00 0 not used 81 1 00 00 00 1 rssi 82 1 00 00 01 0
TUA6120 ?tornado? version 2.01 reference specification 46 2004-02-05 4.3 bus data format sta: start condition, sto: stop condition, ack: acknowledge. table 4-10 bus data format i 2 c-bus write mode i 2 c-bus read mode bit function bit function sta sta 1 msb 1 msb 1 chip address (write) 1 chip address (write) 00 00 00 ma0 ma0 ma1 ma1 3w-bus write mode 3w-bus read mode 0 lsb 0 lsb bit function bit function ack ack s7 msb s7 msb s7 msb s7 msb s6 sub address (write) 00h...06h s6 sub address (read) 80h...82h s6 sub address (write) 00h...06h s6 sub address (read) 80h...82h s5 s5 s5 s5 s4 s4 s4 s4 s3 s3 s3 s3 s2 s2 s2 s2 s1 s1 s1 s1 s0 lsb s0 lsb s0 lsb s0 lsb ack ack sta restart dx msb 1 msb dx msb dx msb ... data in x...0 (x=7,15 or 23) 1 chip address (read) ... data in x...0 (x=7,15 or 23) ... data out x...0 (x=7) d5 0 d5 d5 d4 0 d4 d4 d3 0 d3 d3 d2 ma0 d2 d2 d1 ma1 d1 d1 d0 lsb 1 lsb d0 lsb d0 lsb ack ack sto dx msb ... data out x...0 (x=7) 1) after each byte an acknowledge is generated. d5 d4 d3 d2 d1 d0 lsb 1 sto
TUA6120 ?tornado? version 2.01 reference specification 47 2004-02-05 table 4-11 i 2 c short read bus data format i 2 c-bus read mode the first read must have the same format as a single read : first read bit function - write chip address (write) - sub address (write) - read chip address (write) - data (read) sta 1 msb 1 chip address (write) 0 all following read calls to the same register may have the following short read format : 0 0 ma0 - read chip address (write) - data (read) ma1 0 lsb this mode will only be terminated by a new write operation with - write chip address (write) ack s7 msb s6 sub address (read) 80h...82h s5 s4 repeated short read to the same register as first read s3 s2 s1 s0 lsb ack sta restart sta restart 1 msb 1 msb 1 chip address (read) 1 chip address (read) 00 00 00 ma0 ma0 ma1 ma1 1 lsb 1 lsb ack ack dx msb dx msb ... data out x...0 (x=7) ... data out x...0 (x=7) d5 d5 d4 d4 d3 d3 d2 d2 d1 d1 d0 lsb d0 lsb 1 1 sto sto repeat loop
TUA6120 ?tornado? version 2.01 reference specification 48 2004-02-05 4.4 write registers, data byte specification table 4-12 data byte specification of write data registers register 00 subaddress 00h a/n divider bit symbol bits vfunction description defaults 23 1 reserved must be set to 1 1 22 gv 0 ghz vco switch ghz vco1 is on 0 1 ghz vco2 is on 21 sv 0 synthesizer vco switch syth. vco1 is on 1 1 syth. vco2 is on 20 gn2 gn2 gn1gn0 ghz pll n-counter programmable divider bits n = 2 ... 8 divider ratio gn2 gn1 gn0 0 00 4 0 01 20 01 19 gn1 0 10 3 0 11 4 1 00 5 18 gn0 1 01 6 1 10 7 1 11 8 17 d17 2 10 synthesizer n-counter programmable divider bits: n = 2 10 x d17+ ... + 2 2 x d9 + 2 1 x d8 + d7 n = 2 ... 2047 0 default divider ratio n = 39 16 d16 2 9 0 15 d15 2 8 0 14 d14 2 7 0 13 d13 2 6 0 12 d12 2 5 1 11 d11 2 4 0 10 d10 2 3 0 9 d9 2 2 1 8 d8 2 1 1 7 d7 2 0 1 6 d6 2 6 synthesizer a-counter programmable divider bits: a = 2 6 x d6 +... + 2 2 x d2 + 2 1 x d1 + d0 a = 0 ... 127 0 default divider ratio a =2 5 d5 2 5 0 4 d4 2 4 0 3 d3 2 3 0 2 d2 2 2 0 1 d1 2 1 1 0 d0 2 0 0
TUA6120 ?tornado? version 2.01 reference specification 49 2004-02-05 table 4-12 data byte specificati on, write registers (continued) register 01 subaddress 01h reference divider bit symbol bits vfunction description defaults 15 mod 0 prescaler divider ratio forbidden 1 div. ratio = 32/33 1 14 cp1 cp1 cp0 charge-pump current cp1 cp0 0 0 1 ma 0 0 13 cp0 0 1 1.33 ma 1 0 1.66 ma 1 1 2 ma 12 gr2 gr2 gr1gr0 ghz pll r-counter programmable divider bits r = 2 ... 8 divider ratio 1.) gr2 gr1 gr0 0 00 4 0 01 2 11 gr1 0 10 3 0 11 4 1 00 5 10 gr0 1 01 6 1 10 71 10 1 11 8 9 r9 2 9 synthesizer r-counter programmable divider bits: r = 2 9 x r 9+ ... + 2 2 x r2 + 2 1 x r1 + r0 r = 2 ... 1023 0 default divider ratio r = 5 2.) 8 r8 2 8 0 7 r7 2 7 0 6 r6 2 6 0 5 r5 2 5 0 4 r4 2 4 0 3 r3 2 3 0 2 r2 2 2 1 1 r1 2 1 0 0 r0 2 0 1 1.) the ghz r/n-counter (register 00 bits 18,19,20; register 01 bits 10,11,12) are johnson counters which may hang up if they start from a forbidden state. for a 2-3-4-5-6-7-8 counter chain fo rbidden states can appear at non binary divider values of 3, 5, 6, 7. whereas the forbidden states in odd counter values correct themselves this will not happen with even counter values. therefore the remaining counter value of 6 may come into an forbidden state if the programming is switched from a higher value (7 or 8) to 6, because the higher divider values include the forbidden states for counter value of 6. therefore it is an absolute must to program the counter chain to e.g. 5 (which does not include forbidden states for 6) before it is set from higher values to 6 . if this is not done a proper operation of the TUA6120 cannot be guaranteed. 2.) reference frequency is 800 khz with a 4 mhz crystal.
TUA6120 ?tornado? version 2.01 reference specification 50 2004-02-05 table 4-12 data byte specification of write data registers (continued) register 02 subaddress 02h control bytes bit symbol bits vfunction description defaults 15 fl1 0 lock flag control if fl0 = 1 1) lock flag at p0 0 1 lock flag at p1 14 fl0 0 lock detect output as selected by fl1 1) lock flag not at port 0 1 lock flag at port 13 agcp 0 agc polarity 2) positive agc slope 0 1 negative agc slope 12 ac4 2 4 agc adc clock control divider ratio ac = 2 4 * ac4+...+ 2 1 *ac1+ ac0, ac = 1 ... 31 adc clock for agc = crystal frequency / adc clock divider ratio agc,adc cycle time = 1/9 of adc clock 0 default divider ratio ac = 8 11 ac3 2 3 1 10 ac2 2 2 0 9 ac1 2 1 0 8 ac0 2 0 0 7 st1 st1 st0 stand-by and loop- thru control st1 st0 0 0 normal mode 0 0 0 1 normal mode, but loop thru off 6 st0 1 0 stand-by but lna and loop-thru on 1 1 total stand-by 5 qb1 qb0 qb1 qb0 xtal i/o control qb1 qb0 0 0 xtal is input 0 1 4 0 1 output level = 1.8 v pp 1 0 output level = 2.6 v pp 1 1 output level = 3.3 v pp 3 qil 0 quartz i/o input level preamp = off 0 1 preamp = on 3) 2 pdp 0 phase-detector polarity control polarity = negative 1 1 polarity = positive 1 cpt 0 charge-pump control 4) charge-pump = on 0 1 charge-pump = off 0 os 0 lpf1out on/off lpf1out = off 0 1 lpf1out = on 1) port is switched to tristate if used as lock fl ag output. the port sinks current if the flag is set. 2) only valid if agc is external, otherwise table "register 04" on page 51 3) preamp = on is only allowed if xtal i/o control is input (register 02, bits 4,5 = 0) more table "xtalio input" on page 42 4) if not in test mode, otherwise table "register 06" on page 53 .
TUA6120 ?tornado? version 2.01 reference specification 51 2004-02-05 table 4-12 data byte specification of write data registers (continued) register 03 subaddress 03h port byte bit symbol bits vfunction description defaults 7 p7 not used 0 6 p6 0 5 p5 0 4 p4 0 3 p3 0 2 p2 0 1 p1 0 port control port 1 current is off 0 1 port 1 current is on 0 p0 0 port 0 current is off 0 1 port 0 current is on register 04 subaddress 04h agc mode bit symbol bits v function description defaults 7 ai1 ai1 ai0 agc current i source = 20 a = constant ai1 ai0 6 ai0 0 0 i sink = 150 na 0 0 0 1 i sink = 300 na 1 0 i sink = 450 na 1 1 i sink = 600 na 5 al3 agc control if al3 = 1, al2 = 1, al1 = 1, al0 = 0: agc is external, otherwise agc is internal 0 4 al2 0 3 al1 0 2 al0 0 1 not used 0 0 0
TUA6120 ?tornado? version 2.01 reference specification 52 2004-02-05 table 4-12 data byte specification of write data registers (continued) register 05 subaddress 05h baseband control bit symbol bits vfunction description defaults 7 not used 0 6 f1 f1 f0 base-band filter roll-off f1 f0 0 0 full bandwidth 0 0 0 1 11 mhz 5 f0 1 0 33 mhz 1 1 22 mhz 4 ed 0 base-band amplifier control bb amps = on 0 1 bb amps = off 3 ga2 ga2 ga1 ga0 i/q output level, differential ga2 ga1 ga0 0 00 0.5 v pp 0 01 0.75 v pp 2 ga1 0 10 1.0 v pp 0 10 0 11 1.25 v pp 1 00 1.5 v pp 1 ga0 1 01 1.75 v pp 1 10 2.0 v pp 1 11 not used 0 xo 0 xtal output control xtal output = on 0 1 xtal output = off
TUA6120 ?tornado? version 2.01 reference specification 53 2004-02-05 table 4-12 data byte specification of write data registers (continued) register 06 subaddress 06h test modes bit symbol bits vfunction description defaults 7 not used 0 6 abl2 abl 2 abl 1 abl pulse for phase detector 1) abl 2 abl 1 0 0 1.7 ns 5 abl1 0 1 2.5 ns 0 1 1 0 3.8 ns 1 1 5.8 ns 4 cpm 0 charge-pump control charge-pump = bipolar 0 1 charge-pump = monopolar 3 cpp 0 charge-pump = sinking current, if cpm = 1 0 1 charge-pump = sourcing current if cpm = 1 2 cpt 0 charge-pump = on 0 1 charge-pump = off (tristate) 1 pio 0 test frequency control p0, p1 are input for f ref , f div 2) 1 1 p0, p1 are output for f ref , f div 0 ted 0 testmode control testmode disabled 0 1 testmode enabled 1) abl bits are independent of testmode control bit ted. 2) i/o for f ref is p0, i/o for f div is p1. f ref is the output frequency of the r-counter and f div the output frequency of then-counter.
TUA6120 ?tornado? version 2.01 reference specification 54 2004-02-05 4.5 read registers, data byte specification table 4-13 data byte specification of read data registers register 80 subaddress 80h status bit symbol bits function description defaults 7 por power-on flag 1) por = 1 if power-on reset 6 fl lock-in flag fl = 1 if loop is locked 5 stby3 stand-by flag 3 stby3 = 0 if loop through is on. default is loop through on 4 stby2 stand-by flag 2 stby2 = 0 if lna is on. default is lna on 3 stby1 stand-by flag 1 stby1=0 if direct converter is on. default is direct converter on 2 agc agc flag agc = 1 if agc is external. as default agc is in internal mode 1 not used 1 0 1 1) the power-on flag is reset after a read operation. register 82 subaddress 82h rssi bit symbol bits function description defaults 7 rs7 2 7 rssi (field-strength indicator) rssi = 0 ... 127 rssi = 2 7 x rs7+ 2 6 x rs6+...+ 2 1 x rs1 0 without input signal 6 rs6 2 6 0 5 rs5 2 5 0 4 rs4 2 4 0 3 rs3 2 3 0 2 rs2 2 2 0 1 rs1 2 1 0 0 rs0 2 0 not used 0
TUA6120 ?tornado? version 2.01 reference specification 55 2004-02-05 4.6 vco band switching table table 4-14 vco band switching band f rfin [mhz] synth. vco 1) 1) see register 00 on page 48 . sv bit 1) ghz vco 1) gv bit 1) ghz n- divider ratio 1) ghz r- divider ratio 2) 2) see register 01 on page 49 . remark: the total input frequency range is divided into 14 bands. the crossover frequency of the ghz vco?s, 1500 mhz, is in bold italic letters. after power-on the band 3 is selected as default. ghz n-counter 1) ghz r-counter 2) gn2 gn1 gn0 gr2 gr1 gr0 1 915 2 1 1 0 2 8 0 01 11 1 935 2 935 1 0 7 11 0 1000 3 1000 2 1 1080 4 1080 1 0 6 10 1 1167 5 1167 2 1 1255 6 1255 1 0 3 8 0 10 11 1 1313 7 1313 2 1 1415 8 1415 1 0 7 11 0 1500 9 1500 2 1 2 1 1615 10 1615 1 0 6 10 1 1750 11 1750 2 1 1885 12 1885 1 0 4 7 0 11 11 0 2000 13 2000 2 1 2155 14 2155 1 0 6 10 1 2185
TUA6120 ?tornado? version 2.01 reference specification 56 2004-02-05 4.7 vco band splitting figure 4-1 vco band splitting

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TUA6120 ?tornado? version 2.01 reference specification 57 2004-02-05 4.8 bus timing figure 4-2 i 2 c bus figure 4-3 3-wire bus scl sda t buf s p t hd.dat t hd.sta t high t f t low t r t su.dat t hd.sta t sp p t su.sto s t su.sta busmode = 0 s - s tart condition p - sto p condition clock data enable s t hd.dat t hd.sta t high t f t low t su.dat t sp p t su.sto t su.sclena busmode = 1 t su.sclena t when t r
TUA6120 ?tornado? version 2.01 reference specification 58 2004-02-05 table 4-15 bus timing no parameter symbol limit values unit min max 1 low level input voltage (sda, scl, cas/en, busmode) v il -0.5 0.71 v 2 high level input voltage (sda, scl, cas/en, busmode) v ih 1.3 5.5 v 3 hysteresis of schmitt trigger inputs v hys 0.2 v 4 pulse width of spikes which must be suppressed by the input filter t sp 0 50 ns 5 low level output voltage (sda), only i2c-bus at 3ma sink current at 6ma sink current v ol 0 0.4 0.6 v v 6 output fall time from v ih min to v il max with a bus capacitance from 10pf to 400pf with up to 3ma sink current at v ol t of 20+0.1c b 1) 1) c b = capacitance of one bus line in pf. note that the maximum t f for the sda and scl bus lines quoted in table above (300ns) is longer than the specified maximum t of for the output stages (250ns).this allows series protection resistors to be connected between the sda/scl pins and the sda/scl bus lines without exceeding the maximum specified t f . 250 ns 7 scl clock frequency f scl 0 400 khz 8 bus free time between a stop and start condition 2) 2) only for i 2 c bus mode. t buf 1.3 -s 9 hold time (repeated) start/enable on condition. after this period, the first clock pulse is generated. t hd.sta 0.6 -s 10 low period of the scl clock pulse t low 1.3 -s 11 high period of the scl clock pulse t high 0.6 -s 12 set-up time for a repeated start condition 2) t su.sta 0.6 -s 13 data hold time t hd.dat 0 ns 14 data set-up time t su.dat 100 -ns 15 rise time, fall time of sda and scl signals t r , t f 20+0.1c b 1) 300 ns 16 set-up time for stop/enable off condition t su.sto 0.6 -s 17 setup time scl to cas/en t su.sclen a 0.6 -s 18 h-pulse width (cas/en) for new data protocol 3) t when 0.6 -s 19 capacitive load for each bus line c b -- 400 pf
TUA6120 ?tornado? version 2.01 reference specification 59 2004-02-05 4.9 electrical diagrams 4.9.1 current consumption vs. vcc in this measurement the TUA6120 starts with the power on reset settings. pll tuned to 1000 mhz (crystal = 4mhz, fr ef = 800khz), baseband filter off, other settings see 4.4 write registers, data byte specification on page 48 .

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TUA6120 ?tornado? version 2.01 reference specification 60 2004-02-05 4.9.2 rf input impedance, smith diagram 4.9.3 rf input return loss vs. input frequency 5 10 15 20 25 30 35 40 45 50 75 100 150 200 250 500 1k 0 5 5 10 10 15 15 20 20 25 25 30 30 35 35 40 40 45 45 50 50 75 75 100 100 150 150 200 200 250 250 500 500 1k 1k 800 m 1.5 g 2.2 g @ @ @
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TUA6120 ?tornado? version 2.01 reference specification 61 2004-02-05 4.9.4 noise figure vs. input frequency 4.9.5 s/n vs. input level "#$$ % $&' #()

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TUA6120 ?tornado? version 2.01 reference specification 62 2004-02-05 4.9.6 rf input range 4.9.7 input level vs. agc voltage # )(%$$ &/1 $ & #$$ % &' #() @ @ @ @ @ @
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TUA6120 ?tornado? version 2.01 reference specification 63 2004-02-05 4.9.8 rf output impedance, smith diagram 4.9.9 1. baseband output impedance, smith diagram 5 10 15 20 25 30 35 40 45 50 75 100 150 200 250 500 1k 0 5 5 10 10 15 15 20 20 25 25 30 30 35 35 40 40 45 45 50 50 75 75 100 100 150 150 200 200 250 250 500 500 1k 1k 800 m 1.5 g 2.2 g 5 10 15 20 25 30 35 40 45 50 75 100 150 200 250 500 1k 0 5 5 10 10 15 15 20 20 25 25 30 30 35 35 40 40 45 45 50 50 75 75 100 100 150 150 200 200 250 250 500 500 1k 1k 100 k 30 m 100 m
TUA6120 ?tornado? version 2.01 reference specification 64 2004-02-05 4.9.10 2. baseband output impedance, smith diagram 4.9.11 2. baseband output-inverted impedance, smith diagram 5 10 15 20 25 30 35 40 45 50 75 100 150 200 250 500 1k 0 5 5 10 10 15 15 20 20 25 25 30 30 35 35 40 40 45 45 50 50 75 75 100 100 150 150 200 200 250 250 500 500 1k 1k 100 k 30 m 100 m 100 k 30 m 100 m 100 ? resistor ser. 5 10 15 20 25 30 35 40 45 50 75 100 150 200 250 500 1k 0 5 5 10 10 15 15 20 20 25 25 30 30 35 35 40 40 45 45 50 50 75 75 100 100 150 150 200 200 250 250 500 500 1k 1k 100 k 30 m 100 m 100 k 30 m 100 m 100 ? resistor ser.
TUA6120 ?tornado? version 2.01 reference specification 65 2004-02-05 4.9.12 i-q impairments 3&,-&.,$&%c@.3( @ @ @ @ @
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TUA6120 ?tornado? version 2.01 reference specification 66 2004-02-05 4.9.13 second order intermodulation input related (iip2) 4.9.14 third order intermodulation input related (iip3) 5 &4>@ .3(a4>4., .@d,&e4.>4., .@d& &-%b
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TUA6120 ?tornado? version 2.01 reference specification 67 2004-02-05 4.9.15 phasenoise 4.9.16 frequency response of base band filter both base band amplifiers in series, coupling capacitor 220 nf 4*&,,h%%7.3(58&>(5) ",&%> 5 +>i5>59+% > i5:0@3& . @ @ @ @ @ @ @ @ @
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TUA6120 ?tornado? version 2.01 specification 69 2004-02-05 page table of contents 1 product description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 1.1 overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 1.2 features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 1.3 application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 1.4 package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 2 functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 2.1 pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 2.2 pin definitions and function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 2.3 functional block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 2.4 frequency programming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 2.5 functional block description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 2.5.1 agc-system . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 2.5.2 lna and rf-buffer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 2.5.3 pga and i/q-mixers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 2.5.4 baseband amplifiers and filters . . . . . . . . . . . . . . . . . . . . . . . . 24 2.5.5 output ports . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 2.5.6 reference voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 2.5.7 reference oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 2.5.8 crystal oscillator input/output . . . . . . . . . . . . . . . . . . . . . . . . . . 25 2.5.9 synthesizer loop filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 2.5.10 synthesizer vco?s . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 2.5.11 phase shift 0 / 90 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 2.5.12 ghz vco . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 2.6 ghz pll . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 2.6.1 functional ghz pll block diagram . . . . . . . . . . . . . . . . . . . . . 28 3 application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 3.1 application circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 3.2 phase noise performance of application . . . . . . . . . . . . . . . . . . . . 30 4 reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 4.1 electrical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 4.1.1 absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 4.1.2 operating range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 4.1.3 ac/dc characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 4.2 bus interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
TUA6120 ?tornado? version 2.01 specification 70 2004-02-05 page table of contents 4.2.1 addressing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 4.2.2 sub addressing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 4.3 bus data format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46 4.4 write registers, data byte specification . . . . . . . . . . . . . . . . . . . . 48 4.5 read registers, data byte specification . . . . . . . . . . . . . . . . . . . 54 4.6 vco band switching table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55 4.7 vco band splitting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56 4.8 bus timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57 4.9 electrical diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59 4.9.1 current consumption vs. vcc . . . . . . . . . . . . . . . . . . . . . . . . . . . 59 4.9.2 rf input impedance, smith diagram . . . . . . . . . . . . . . . . . . . . . 60 4.9.3 rf input return loss vs. input frequency . . . . . . . . . . . . . . . . . . 60 4.9.4 noise figure vs. input frequency . . . . . . . . . . . . . . . . . . . . . . . . 61 4.9.5 s/n vs. input level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61 4.9.6 rf input range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62 4.9.7 input level vs. agc voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62 4.9.8 rf output impedance, smith diagram . . . . . . . . . . . . . . . . . . . . 63 4.9.9 1. baseband output impedance, smith diagram . . . . . . . . . . . . 63 4.9.10 2. baseband output impedance, smith diagram . . . . . . . . . . . . 64 4.9.11 2. baseband output-inverted impedance, smith diagram . . . . . 64 4.9.12 i-q impairments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65 4.9.13 second order intermodulation input related (iip2) . . . . . . . . . . . 66 4.9.14 third order intermodulation input related (iip3) . . . . . . . . . . . . . 66 4.9.15 phasenoise . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67 4.9.16 frequency response of base band filter both base band amplifiers in series, coupling capacitor 220 nf 67

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